Papers

Application of nanosphere lithography to charge trap flash memories with patterned Si3N4 trap layers (IF 2.305 ; JCR 42.784%)

2012
작성자
유경종
작성일
2012-05-24 17:08
조회
172
저널명 : Microelectronic Engineering, 98 347-350 (2012, OCT)
논문 저자
Ho-Myoung An, Hee-Dong Kim, Hee-Wook You, Kyeong Heon Kim, Yun Mo Sung, Won-Ju Cho, and Tae Geun Kim*
chevron-down